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etvfutures.com June 23, 2017


IBM Figures Out How to Make 5nm Chips

19 June 2017, 02:14 | Brandon Parsons

IBM's new 5nm architecture crams 30 billion transistors onto fingernail-sized chip

IMG_0650

5nm silicon nanosheet transistors.

'For business and society to meet the demands of cognitive and cloud computing in the coming years, advancement in semiconductor technology is essential, ' explained Arvind Krishna, senior vice president of IBM's hybrid cloud division and director of IBM's Research arm.

The Research Alliance, a group based at the SUNY Nanocomplex in NY and led by IBM, have managed to develop 5nm transistors.

To achieve the breakthrough the Research Alliance had to overcome the problems plaguing EUV (extreme ultraviolet) lithography, which was already on its roadmap for producing 7nm FinFETs.

Like the 7nm test chip before it, the latest semiconductor proof point is part of IBM's $3 billion, five-year investment in chip R&D that was announced in 2014.

According to the announcement, the technology also provides an extra benefit.

With EUV and nanosheet transistor architecture technique, IBM says the width of the nanosheets can be adjusted continuously within a single manufacturing process.

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The flexibility of nanosheets permits the fine-tuning of performance and power for specific circuits - something not possible with today's FinFET transistor architecture, which is limited by its current-carrying fin height.

Using the latest FinFET technology, Samsung past year began producing 10-nanometer chips for new electronic devices, including its own Galaxy S8 smartphone, which was launched in April. Most chip manufacturers plan to use some version of FinFET through the 7nm node. This is made possible by using nanosheets instead of fins as the main structure of the transistors. IBM worked to ideal nanosheet semiconductor technology for over a decade. "I would estimate that at 5nm you will still see traditional FinFET", said McGregor, "You may see IBM's nanosheet architecture creep in later on, maybe as a sub-node to 5nm or a following process". This isn't to mention all the gazillions of chips that will be needed to power self-driving cars, servers, homes, drones, in-device artificial intelligence and 5G sensors and cameras that drive the dreams of every device maker in the world-and there are a lot of them.

Hopefully, the new research might be able to keep Moore's law alive.

Though Moore's Law has slowed down in recent years and some experts even think it's dead, chip designers continue to work their magic.

The circuitry of most chips, including the 10-nanometer chips that are in use today, is based on a three-gate structure.

The economics of building nanosheet fabs still has to be worked out.

"This is a major innovation for scaling beyond 7 nanometers", Khare said.



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